news 28 Posted August 15, 2009 So we played, and played some more and all of a sudden, the transients are no longer transients, instead, they are p-states that are locked in over extended periods of time where the CPU runs at ½ or 2/3 of its maximum core frequency, enough to sustain the data to the peripherals like GPU and so on but no more than what is needed. Power consumption is a factor of the frequency but it is also a factor of the switch events and the switch events are the execution of the work load (for dummies). In other words, the higher the workload, the more switch events and that translates into more power that is needed. Arguably, there is a balance, or rather a philosophy between running 100% load at lower frequency or running lower CPU usage but ramping up the frequency. For power considerations, both come out about the same. For performance, on the other hand, where dependencies are involved, high frequency and lower load should be faster, at least on the level of individual instruction executions. All of this stuff sounds perfectly logical – in retrospect – but yes, it was a bit surprising to see that it actually works this way. Pretty cool stuff, indeed. And forget the 140W TDP, well, unless you are thriving on running Linpack64 or similar. By the end of the day, what we are looking at is a CPU that has enough power so that it DOES NOT NEED to run at full throttle all the time. Still, it is a good thing to have the necessary infrastructure in place and that is where the TDP comes into play as a measure for qualification and quality control. http://www.lostcircuits.com/mambo//index.php?option=com_content&task=view&id=62&Itemid=42 AMD's Phenom II X4 965 BE (LostCircuits) As always, many thanks for any linkage! Best Regards, Michael -- Michael Schuette, ms ( -at -) lostcircuits.com on 8/14/2009 Share this post Link to post
