in symetric multi processor config all CPU sync occurs in the cache. less cache less SMP will happen. More cache such as in a PII or PIII that has 512k more effeicent data processing. Thats why celerons that have 128k cache arent good for SMP. Thats why the old Pent Pro and new Xeon have more cache.

My dual celeron 400@500 system will kick the hell out of yours, Xeon....sure, $2500 for a 550 with 1mb cache

He asked a simple question EddiE314
, don't insult my intelligence, sounds like you're a little B1TCH that was picked on as a child.

rOcko: No one hears your small voice anymore. Why not go on irc and find some conflict there? Stop by #riva on efnet sometime so I can test my new bot scripts on you...

On SMP with Celerons: SMP and it's benefits are far more dictated by your applications than CPU cache. I have a dual cele 500 Mhz setup and it floats. If you pair a dual cele setup with a GeForce card you're looking at a seriously bad-ass system with few bottlenecks. Go SCSI as well and you can be rOcko's daddy.

I have a dual Celeron system, I do not find any great improvement compared to a uniprocessor system. Anyway, most programs are single threaded, therefore, it would not benefit the SMP users out there.

The benefit of using SMP system is, you can have more things done at the same amount of time, not you can have more things done in less time (which many people misunderstood). It can only show its potential when the program is multithreaded.

I do agree that Celerons are crippled by its low amount of cache compared with PIII or Xeon. But when considering the number of Celerons you can buy when you buy a Xeon, I think Celeron definitely win the performance/price throne.

Thats right rocko, you are a little B1tch.
Good, at least you can read my posts about you